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027c3dca80
Some quirk of the Pico2 W versus the Pico W causes wireless to be very
upset by our chained DMA display driver code.
See:
* https://github.com/micropython/micropython/issues/16627
* https://github.com/raspberrypi/pico-sdk/issues/2206
Backport a Pico SDK patch to fix this.
See:
* 2a810a9267
58 lines
2.6 KiB
Diff
58 lines
2.6 KiB
Diff
From 2a810a926722b163ea3f7b183053964a2dc57e76 Mon Sep 17 00:00:00 2001
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From: Peter Harper <peter.harper@raspberrypi.com>
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Date: Fri, 24 Jan 2025 18:47:52 +0000
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Subject: [PATCH] Fix unreliable writes to cyw43.
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We use a pio and dma to write to the cyw43 chip using spi. Normally you
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write an address and then read the data from that address, so the pio
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program does does a write then read.
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If you just want to write data in the case of uploading firmware we
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use the fdebug_tx_stall flag to work out if the pio has stalled waiting
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to read data which will never arrive.
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The theory is that this flag will also get set if the bus is busy. So
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we mistakenly think a write to cyw43 has completed.
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Add a check for the dma irq as well.
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Fixes #2206
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---
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src/rp2_common/pico_cyw43_driver/cyw43_bus_pio_spi.c | 9 ++++++++-
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1 file changed, 8 insertions(+), 1 deletion(-)
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diff --git a/src/rp2_common/pico_cyw43_driver/cyw43_bus_pio_spi.c b/src/rp2_common/pico_cyw43_driver/cyw43_bus_pio_spi.c
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index bcc7284f1..302155ca2 100644
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--- a/src/rp2_common/pico_cyw43_driver/cyw43_bus_pio_spi.c
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+++ b/src/rp2_common/pico_cyw43_driver/cyw43_bus_pio_spi.c
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@@ -231,7 +231,7 @@ int cyw43_spi_transfer(cyw43_int_t *self, const uint8_t *tx, size_t tx_length, u
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return CYW43_FAIL_FAST_CHECK(-CYW43_EINVAL);
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}
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- bus_data_t *bus_data = (bus_data_t *)self->bus_data;
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+ volatile bus_data_t *bus_data = (bus_data_t *)self->bus_data;
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start_spi_comms(self);
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if (rx != NULL) {
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if (tx == NULL) {
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@@ -306,6 +306,7 @@ int cyw43_spi_transfer(cyw43_int_t *self, const uint8_t *tx, size_t tx_length, u
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channel_config_set_bswap(&out_config, true);
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channel_config_set_dreq(&out_config, pio_get_dreq(bus_data->pio, bus_data->pio_sm, true));
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+ dma_hw->ints0 = 1u << bus_data->dma_out;
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dma_channel_configure(bus_data->dma_out, &out_config, &bus_data->pio->txf[bus_data->pio_sm], tx, tx_length / 4, true);
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uint32_t fdebug_tx_stall = 1u << (PIO_FDEBUG_TXSTALL_LSB + bus_data->pio_sm);
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@@ -315,6 +316,12 @@ int cyw43_spi_transfer(cyw43_int_t *self, const uint8_t *tx, size_t tx_length, u
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tight_loop_contents(); // todo timeout
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}
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__compiler_memory_barrier();
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+
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+ while (!(dma_hw->intr & 1u << bus_data->dma_out)) {
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+ tight_loop_contents();
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+ }
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+ dma_hw->ints0 = 1u << bus_data->dma_out;
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+
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pio_sm_set_enabled(bus_data->pio, bus_data->pio_sm, false);
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pio_sm_set_consecutive_pindirs(bus_data->pio, bus_data->pio_sm, CYW43_PIN_WL_DATA_IN, 1, false);
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} else if (rx != NULL) { /* currently do one at a time */
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