mirror of
https://github.com/danbee/8080
synced 2025-03-04 08:39:07 +00:00
All opcodes are in!
Yay!
This commit is contained in:
parent
771f0b8a8e
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GPG Key ID:
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370
src/main.rs
370
src/main.rs
@ -6,27 +6,215 @@ fn opcode(input: &Vec<u8>, counter: usize) -> usize {
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let opcode = input[counter];
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match opcode {
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// 00
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0x00 => { println!("NOP"); size = 1 },
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0x0f => { println!("RRC"); size = 1 },
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0x21 => {
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println!("LXI ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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0x01 => {
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println!("LXI B,${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0x27 => { println!("DAA"); size = 1 },
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0x32 => {
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println!("STA ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0x35 => { println!("DCR M"); size = 1 },
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0x3a => {
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println!("LDA ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0x3e => {
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println!("MVI A,#0x{:02x}", input[counter + 1]);
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0x02 => { println!("STAX B"); size = 1 },
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0x03 => { println!("INX B"); size = 1 },
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0x04 => { println!("INR B"); size = 1 },
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0x05 => { println!("DCR B"); size = 1 },
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0x06 => {
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println!("MVI B,#0x{:02x}", input[counter + 1]);
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size = 2;
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},
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0x07 => { println!("RLC"); size = 1 },
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// 08
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0x08 => { println!("*NOP"); size = 1 },
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0x09 => { println!("DAD B"); size = 1 },
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0x0a => { println!("LDAX B"); size = 1 },
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0x0b => { println!("DCX B"); size = 1 },
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0x0c => { println!("INR C"); size = 1 },
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0x0d => { println!("DCR C"); size = 1 },
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0x0e => {
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println!("MVI C,#0x{:02x}", input[counter + 1]);
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size = 2;
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},
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0x0f => { println!("RRC"); size = 1 },
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// 10
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0x10 => { println!("*NOP"); size = 1 },
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0x11 => {
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println!("LXI D,${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0x12 => { println!("STAX D"); size = 1 },
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0x13 => { println!("INX D"); size = 1 },
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0x14 => { println!("INR D"); size = 1 },
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0x15 => { println!("DCR D"); size = 1 },
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0x16 => {
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println!("MVI D,#0x{:02x}", input[counter + 1]);
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size = 2;
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},
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0x17 => { println!("RAL"); size = 1 },
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// 18
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0x18 => { println!("*NOP"); size = 1 },
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0x19 => { println!("DAD D"); size = 1 },
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0x1a => { println!("LDAX D"); size = 1 },
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0x1b => { println!("DCX D"); size = 1 },
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0x1c => { println!("INR E"); size = 1 },
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0x1d => { println!("DCR E"); size = 1 },
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0x1e => {
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println!("MVI E,#0x{:02x}", input[counter + 1]);
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size = 2;
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},
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0x1f => { println!("RAR"); size = 1 },
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// 20
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0x20 => { println!("*NOP"); size = 1 },
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0x21 => {
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println!("LXI H,${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0x22 => {
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println!("SHLD ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0x23 => { println!("INX H"); size = 1 },
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0x24 => { println!("INR H"); size = 1 },
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0x25 => { println!("DCR H"); size = 1 },
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0x26 => {
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println!("MVI H,#0x{:02x}", input[counter + 1]);
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size = 2;
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},
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0x27 => { println!("DDA"); size = 1 },
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// 28
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0x28 => { println!("*NOP"); size = 1 },
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0x29 => { println!("DAD H"); size = 1 },
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0x2a => {
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println!("LHLD ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0x2b => { println!("DCX H"); size = 1 },
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0x2c => { println!("INR L"); size = 1 },
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0x2d => { println!("DCR L"); size = 1 },
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0x2e => {
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println!("MVI L,#0x{:02x}", input[counter + 1]);
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size = 2;
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},
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0x2f => { println!("CMA"); size = 1 },
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// 30
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0x30 => { println!("*NOP"); size = 1 },
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0x31 => {
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println!("LXI SP,${:03x}{:03x}", input[counter + 3], input[counter + 1]);
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size = 3;
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},
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0x32 => {
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println!("STA ${:03x}{:03x}", input[counter + 3], input[counter + 1]);
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size = 3;
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},
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0x33 => { println!("INX SP"); size = 1 },
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0x34 => { println!("INR M"); size = 1 },
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0x35 => { println!("DCR M"); size = 1 },
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0x36 => {
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println!("MVI M,#0x{:03x}", input[counter + 1]);
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size = 3;
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},
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0x37 => { println!("STC"); size = 1 },
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// 38
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0x38 => { println!("*NOP"); size = 1 },
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0x39 => { println!("DAD SP"); size = 1 },
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0x3a => {
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println!("LDA ${:03x}{:03x}", input[counter + 3], input[counter + 1]);
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size = 3;
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},
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0x3b => { println!("DCX SP"); size = 1 },
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0x3c => { println!("INR A"); size = 1 },
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0x3d => { println!("DCR A"); size = 1 },
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0x3e => {
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println!("MVI A,#0x{:03x}", input[counter + 1]);
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size = 3;
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},
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0x3f => { println!("CMC"); size = 1 },
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// 40
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0x40 => { println!("MOV B,B"); size = 1 },
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0x41 => { println!("MOV B,C"); size = 1 },
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0x42 => { println!("MOV B,D"); size = 1 },
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0x43 => { println!("MOV B,E"); size = 1 },
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0x44 => { println!("MOV B,H"); size = 1 },
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0x45 => { println!("MOV B,L"); size = 1 },
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0x46 => { println!("MOV B,M"); size = 1 },
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0x47 => { println!("MOV B,A"); size = 1 },
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// 48
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0x48 => { println!("MOV C,B"); size = 1 },
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0x49 => { println!("MOV C,C"); size = 1 },
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0x4a => { println!("MOV C,D"); size = 1 },
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0x4b => { println!("MOV C,E"); size = 1 },
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0x4c => { println!("MOV C,H"); size = 1 },
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0x4d => { println!("MOV C,L"); size = 1 },
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0x4e => { println!("MOV C,M"); size = 1 },
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0x4f => { println!("MOV C,A"); size = 1 },
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// 50
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0x50 => { println!("MOV D,B"); size = 1 },
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0x51 => { println!("MOV D,C"); size = 1 },
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0x52 => { println!("MOV D,D"); size = 1 },
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0x53 => { println!("MOV D,E"); size = 1 },
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0x54 => { println!("MOV D,H"); size = 1 },
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0x55 => { println!("MOV D,L"); size = 1 },
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0x56 => { println!("MOV D,M"); size = 1 },
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0x57 => { println!("MOV D,A"); size = 1 },
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// 58
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0x58 => { println!("MOV E,B"); size = 1 },
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0x59 => { println!("MOV E,C"); size = 1 },
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0x5a => { println!("MOV E,D"); size = 1 },
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0x5b => { println!("MOV E,E"); size = 1 },
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0x5c => { println!("MOV E,H"); size = 1 },
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0x5d => { println!("MOV E,L"); size = 1 },
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0x5e => { println!("MOV E,M"); size = 1 },
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0x5f => { println!("MOV E,A"); size = 1 },
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// 60
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0x60 => { println!("MOV H,B"); size = 1 },
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0x61 => { println!("MOV H,C"); size = 1 },
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0x62 => { println!("MOV H,D"); size = 1 },
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0x63 => { println!("MOV H,E"); size = 1 },
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0x64 => { println!("MOV H,H"); size = 1 },
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0x65 => { println!("MOV H,L"); size = 1 },
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0x66 => { println!("MOV H,M"); size = 1 },
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0x67 => { println!("MOV H,A"); size = 1 },
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// 68
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0x68 => { println!("MOV L,B"); size = 1 },
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0x69 => { println!("MOV L,C"); size = 1 },
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0x6a => { println!("MOV L,D"); size = 1 },
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0x6b => { println!("MOV L,E"); size = 1 },
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0x6c => { println!("MOV L,H"); size = 1 },
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0x6d => { println!("MOV L,L"); size = 1 },
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0x6e => { println!("MOV L,M"); size = 1 },
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0x6f => { println!("MOV L,A"); size = 1 },
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// 70
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0x70 => { println!("MOV M,B"); size = 1 },
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0x71 => { println!("MOV M,C"); size = 1 },
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0x72 => { println!("MOV M,D"); size = 1 },
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0x73 => { println!("MOV M,E"); size = 1 },
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0x74 => { println!("MOV M,H"); size = 1 },
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0x75 => { println!("MOV M,L"); size = 1 },
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0x76 => { println!("HLT"); size = 1 },
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0x77 => { println!("MOV M,A"); size = 1 },
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// 78
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0x78 => { println!("MOV A,B"); size = 1 },
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0x79 => { println!("MOV A,C"); size = 1 },
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0x7a => { println!("MOV A,D"); size = 1 },
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0x7b => { println!("MOV A,E"); size = 1 },
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0x7c => { println!("MOV A,H"); size = 1 },
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0x7d => { println!("MOV A,L"); size = 1 },
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0x7e => { println!("MOV A,M"); size = 1 },
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0x7f => { println!("MOV A,A"); size = 1 },
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// 80
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0x80 => { println!("ADD B"); size = 1 },
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0x81 => { println!("ADD C"); size = 1 },
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0x82 => { println!("ADD D"); size = 1 },
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@ -36,6 +224,7 @@ fn opcode(input: &Vec<u8>, counter: usize) -> usize {
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0x86 => { println!("ADD M"); size = 1 },
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0x87 => { println!("ADD A"); size = 1 },
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// 88
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0x88 => { println!("ADC B"); size = 1 },
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0x89 => { println!("ADC C"); size = 1 },
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0x8a => { println!("ADC D"); size = 1 },
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@ -45,6 +234,7 @@ fn opcode(input: &Vec<u8>, counter: usize) -> usize {
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0x8e => { println!("ADC M"); size = 1 },
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0x8f => { println!("ADC A"); size = 1 },
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// 90
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0x90 => { println!("SUB B"); size = 1 },
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0x91 => { println!("SUB C"); size = 1 },
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0x92 => { println!("SUB D"); size = 1 },
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@ -54,6 +244,7 @@ fn opcode(input: &Vec<u8>, counter: usize) -> usize {
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0x96 => { println!("SUB M"); size = 1 },
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0x97 => { println!("SUB A"); size = 1 },
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// 98
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0x98 => { println!("SBB B"); size = 1 },
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0x99 => { println!("SBB C"); size = 1 },
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0x9a => { println!("SBB D"); size = 1 },
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@ -63,6 +254,7 @@ fn opcode(input: &Vec<u8>, counter: usize) -> usize {
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0x9e => { println!("SBB M"); size = 1 },
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0x9f => { println!("SBB A"); size = 1 },
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// a0
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0xa0 => { println!("ANA B"); size = 1 },
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0xa1 => { println!("ANA C"); size = 1 },
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0xa2 => { println!("ANA D"); size = 1 },
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@ -72,6 +264,7 @@ fn opcode(input: &Vec<u8>, counter: usize) -> usize {
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0xa6 => { println!("ANA M"); size = 1 },
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0xa7 => { println!("ANA A"); size = 1 },
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// a8
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0xa8 => { println!("XRA B"); size = 1 },
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0xa9 => { println!("XRA C"); size = 1 },
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0xaa => { println!("XRA D"); size = 1 },
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@ -81,6 +274,7 @@ fn opcode(input: &Vec<u8>, counter: usize) -> usize {
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0xae => { println!("XRA M"); size = 1 },
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0xaf => { println!("XRA A"); size = 1 },
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// b0
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0xb0 => { println!("ORA B"); size = 1 },
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0xb1 => { println!("ORA C"); size = 1 },
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0xb2 => { println!("ORA D"); size = 1 },
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@ -90,6 +284,7 @@ fn opcode(input: &Vec<u8>, counter: usize) -> usize {
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0xb6 => { println!("ORA M"); size = 1 },
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0xb7 => { println!("ORA A"); size = 1 },
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// b8
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0xb8 => { println!("CMP B"); size = 1 },
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0xb9 => { println!("CMP C"); size = 1 },
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0xba => { println!("CMP D"); size = 1 },
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@ -99,6 +294,9 @@ fn opcode(input: &Vec<u8>, counter: usize) -> usize {
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0xbe => { println!("CMP M"); size = 1 },
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0xbf => { println!("CMP A"); size = 1 },
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// c0
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0xc0 => { println!("RNZ"); size = 1 },
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0xc1 => { println!("POP B"); size = 1 },
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0xc2 => {
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println!("JNZ ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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@ -107,20 +305,67 @@ fn opcode(input: &Vec<u8>, counter: usize) -> usize {
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println!("JMP ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0xc4 => {
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println!("CNZ ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0xc5 => { println!("PUSH B"); size = 1 },
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0xc6 => {
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println!("ADI #0x{:02x}", input[counter + 1]);
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size = 2;
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},
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0xc7 => { println!("RST 0"); size = 1 },
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// c8
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0xc8 => { println!("RZ"); size = 1 },
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0xc9 => { println!("RET"); size = 1 },
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0xca => {
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println!("JZ ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0xcb => {
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println!("*JMP ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0xcc => {
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println!("CZ ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0xcd => {
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println!("CALL ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0xce => {
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println!("ACI #0x{:02x}", input[counter + 1]);
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size = 2;
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},
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0xcf => { println!("RST 1"); size = 1 },
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// d0
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0xd0 => { println!("RNC"); size = 1 },
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0xd1 => { println!("POP D"); size = 1 },
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0xd2 => {
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println!("JNC ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0xd3 => {
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println!("OUT #0x{:02x}", input[counter + 1]);
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size = 2;
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},
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0xd4 => {
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println!("CNC ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0xd5 => { println!("PUSH D"); size = 1 },
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0xd6 => {
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println!("SUI #0x{:02x}", input[counter + 1]);
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size = 2;
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},
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0xd7 => { println!("RST 2"); size = 1 },
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// d8
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0xd8 => { println!("RC"); size = 1 },
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0xd9 => { println!("*RET"); size = 1 },
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0xda => {
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println!("JC ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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@ -128,14 +373,104 @@ fn opcode(input: &Vec<u8>, counter: usize) -> usize {
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0xdb => {
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println!("IN #0x{:02x}", input[counter + 1]);
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size = 2;
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}
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},
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0xdc => {
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println!("CC ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0xdd => {
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println!("*CALL ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
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size = 3;
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},
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0xde => {
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println!("SBI #0x{:02x}", input[counter + 1]);
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size = 2;
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},
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0xdf => { println!("RST 3"); size = 1 },
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// e0
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||||
0xe0 => { println!("RPO"); size = 1 },
|
||||
0xe1 => { println!("POP H"); size = 1 },
|
||||
0xe2 => {
|
||||
println!("JPO ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
|
||||
size = 3;
|
||||
},
|
||||
0xe3 => { println!("XTHL"); size = 1 },
|
||||
0xe4 => {
|
||||
println!("CPO ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
|
||||
size = 3;
|
||||
},
|
||||
0xe5 => { println!("PUSH H"); size = 1 },
|
||||
0xe6 => {
|
||||
println!("ANI #0x{:02x}", input[counter + 1]);
|
||||
size = 2;
|
||||
},
|
||||
0xe7 => { println!("RST 4"); size = 1 },
|
||||
|
||||
// e8
|
||||
0xe8 => { println!("RPE"); size = 1 },
|
||||
0xe9 => { println!("PCHL"); size = 1 },
|
||||
0xea => {
|
||||
println!("JPE ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
|
||||
size = 3;
|
||||
},
|
||||
0xeb => { println!("XCHG"); size = 1 },
|
||||
0xec => {
|
||||
println!("CPE ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
|
||||
size = 3;
|
||||
},
|
||||
0xed => {
|
||||
println!("*CALL ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
|
||||
size = 3;
|
||||
},
|
||||
0xee => {
|
||||
println!("XRI #0x{:02x}", input[counter + 1]);
|
||||
size = 2;
|
||||
},
|
||||
0xef => { println!("RST 5"); size = 1 },
|
||||
|
||||
// f0
|
||||
0xf0 => { println!("RP"); size = 1 },
|
||||
0xf1 => { println!("POP PSW"); size = 1 },
|
||||
0xf2 => {
|
||||
println!("JP ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
|
||||
size = 3;
|
||||
},
|
||||
0xf3 => { println!("DI"); size = 1 },
|
||||
0xf4 => {
|
||||
println!("CP ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
|
||||
size = 3;
|
||||
},
|
||||
0xf5 => { println!("PUSH PSW"); size = 1 },
|
||||
0xf6 => {
|
||||
println!("ORI #0x{:02x}", input[counter + 1]);
|
||||
size = 2;
|
||||
},
|
||||
0xf7 => { println!("RST 6"); size = 1 },
|
||||
|
||||
// f8
|
||||
0xf8 => { println!("RM"); size = 1 },
|
||||
0xf9 => { println!("SPHL"); size = 1 },
|
||||
0xfa => {
|
||||
println!("JM ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
|
||||
size = 3;
|
||||
},
|
||||
0xfb => { println!("EI"); size = 1 },
|
||||
0xfc => {
|
||||
println!("CM ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
|
||||
size = 3;
|
||||
},
|
||||
0xfd => {
|
||||
println!("*CALL ${:02x}{:02x}", input[counter + 2], input[counter + 1]);
|
||||
size = 3;
|
||||
},
|
||||
0xfe => {
|
||||
println!("CPI #0x{:02x}", input[counter + 1]);
|
||||
size = 2;
|
||||
},
|
||||
_ => { println!("{:02x}", opcode); size = 1 },
|
||||
0xff => { println!("RST 7"); size = 1 },
|
||||
|
||||
_ => { println!("- {:02x}", opcode); size = 1 },
|
||||
}
|
||||
|
||||
size
|
||||
@ -158,6 +493,7 @@ fn main() {
|
||||
|
||||
while counter < input.len() {
|
||||
// get the instruction
|
||||
print!("{:04x} ", counter);
|
||||
oplength = opcode(&input, counter);
|
||||
counter += oplength;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user